DocumentCode
2012621
Title
Core Allocation and Relocation Management for a Self Dynamically Reconfigurable Architecture
Author
Morandi, M. ; Novati, M. ; Santambrogio, M.D. ; Sciuto, D.
Author_Institution
DEI, Politec. di Milano, Milan
fYear
2008
fDate
7-9 April 2008
Firstpage
286
Lastpage
291
Abstract
Self, partial and dynamical reconfiguration, in both its 1D and 2D paradigms, gives the possibility of enhancing the flexibility of a reconfigurable system. It is a powerful approach but, at the same time, causes a significant increase in the complexity of system creation and management. The 1D paradigm allows the dynamical reconfiguration of columns spanning the whole device vertically; the 2D paradigm, on the other hand, allows the reconfiguration of areas of arbitrary rectangular shape. The 2D approach is more powerful, because of the added flexibility, but also requires a more complex management. The goal of this paper is to present a complete workflow to support the designer in creating and managing such systems, specifically in the identification of the online cores placement and in the core relocation support. This paper presents a workflow able to combine online cores placement with runtime bitstreams relocation to implement a complete solution that can be used in conjunction with runtime self reconfiguration. The validation phase presents the results obtained in placement management and relocation, compared to the results obtained by state of art solutions to this problem.
Keywords
field programmable gate arrays; reconfigurable architectures; 1D paradigm; 2D paradigm; core allocation management; core relocation management; field programmable gate array; runtime bitstream relocation; self dynamically reconfigurable architecture; validation phase; Computer Society; Electronic mail; Energy management; Field programmable gate arrays; Filters; Power system management; Reconfigurable architectures; Runtime; Shape; Very large scale integration; 2D reconfiguration; online placement; relocation; self reconfiguration;
fLanguage
English
Publisher
ieee
Conference_Titel
Symposium on VLSI, 2008. ISVLSI '08. IEEE Computer Society Annual
Conference_Location
Montpellier
Print_ISBN
978-0-7695-3291-2
Electronic_ISBN
978-0-7695-3170-0
Type
conf
DOI
10.1109/ISVLSI.2008.39
Filename
4556809
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