DocumentCode :
2012639
Title :
Integrated reactor and feature scale analysis of plasma enhanced semiconductor fabrication processes
Author :
Cole, J.V. ; Kolobov, V.I.
Author_Institution :
CFD Res. Corp., Huntsville, AL, USA
fYear :
2003
fDate :
5-5 June 2003
Firstpage :
192
Abstract :
Summary form only given, as follows. We will present an integrated analysis of the effects of reactor design and process conditions on the resulting feature topography during a plasma-enhanced deposition process. We discuss the effects of reactor design, operating conditions, and underlying physical and chemical processes on both the wafer scale uniformity and feature scale topography. An example of such an analysis is shown which shows the evolution of the film surface during the filling of a trench by a high-density plasma deposition process. The process model includes sputtering of the deposited film by energetic ions with an angular dependent sputter yield, resulting in a complete fill of the trench and faceting of the film above the original substrate surface.
Keywords :
plasma materials processing; semiconductor process modelling; plasma enhanced semiconductor fabrication processes; plasma-enhanced deposition process; sputtering; Chemical processes; Fabrication; Filling; Inductors; Plasma chemistry; Process design; Semiconductor device modeling; Sputtering; Substrates; Surface topography;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Plasma Science, 2003. ICOPS 2003. IEEE Conference Record - Abstracts. The 30th International Conference on
Conference_Location :
Jeju, South Korea
ISSN :
0730-9244
Print_ISBN :
0-7803-7911-X
Type :
conf
DOI :
10.1109/PLASMA.2003.1228663
Filename :
1228663
Link To Document :
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