DocumentCode
2013131
Title
Using Higher Levels of Abstraction for Solving Optimization Problems by Boolean Satisfiability
Author
Wille, Robert ; Grosse, Daniel ; Soeken, Mathias ; Drechsler, Rolf
Author_Institution
Inst. of Comput. Sci., Bremen Univ., Bremen
fYear
2008
fDate
7-9 April 2008
Firstpage
411
Lastpage
416
Abstract
Optimization problems can be solved using Boolean satisfiability by mapping them to a sequence of decision problems. Therefore, in the last years several encodings have been developed. Independently, also new solvers have been introduced lifting Boolean satisfiability to higher levels of abstraction, e.g. SAT modulo theories (SMT) solvers and word level solvers. Both support bit-vector logic and thus allow more compact encodings of the problems. In this paper we investigate the efficiency of these new solver paradigms applied to optimization problems. We show for two case studies - graph coloring and exact synthesis of reversible logic - that the resulting problem instances can be reduced with respect to the size. In addition for the synthesis problem significant run-time improvements can be achieved.
Keywords
Boolean algebra; computability; optimisation; Boolean satisfiability; abstraction; bit-vector logic; compact encoding; decision problem; graph coloring; optimization problem; reversible logic; Application software; Art; Circuit testing; Computer Society; Computer science; Encoding; Logic gates; Runtime; Surface-mount technology; Very large scale integration; Bit-vector Logic; Boolean Satisfiability; Optimization Problems; SMT; Word Level;
fLanguage
English
Publisher
ieee
Conference_Titel
Symposium on VLSI, 2008. ISVLSI '08. IEEE Computer Society Annual
Conference_Location
Montpellier
Print_ISBN
978-0-7695-3291-2
Electronic_ISBN
978-0-7695-3170-0
Type
conf
DOI
10.1109/ISVLSI.2008.82
Filename
4556830
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