• DocumentCode
    2013249
  • Title

    A new full adder cell for low-power applications

  • Author

    Shams, Ahmed M. ; Bayoumi, Magdy A.

  • Author_Institution
    Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
  • fYear
    1998
  • fDate
    19-21 Feb 1998
  • Firstpage
    45
  • Lastpage
    49
  • Abstract
    A new low power CMOS 1-bit full adder cell is presented. It is based on recent design of XOR and XNOR gates, and pass-transistors, it has 17 transistors. This cell has been compared to two widely used efficient adder cells; the transmission function full adder cell (16 transistors) and the low power adder cell (14 transistors). The new cell has no short circuit power and lower dynamic power (than the other adder cells), because of less number and magnitude of circuit capacitances. It consumes 10% to 15% less power than the other two cells. A comparative analysis (using Magic and Hspice) for 8-bit ripple carry and carry select adders shows that the adders based on the new cell can save up to 25% of power consumption
  • Keywords
    CMOS logic circuits; SPICE; adders; carry logic; circuit analysis computing; logic gates; 8 bit; CMOS; Hspice; Magic; XNOR gates; XOR gates; carry select adders; circuit capacitances; dynamic power; full adder cell; low-power applications; pass-transistors; power consumption; ripple carry adders; Adders; Application software; Capacitance; Circuits; Energy consumption; Leakage current; Power supplies; Short circuit currents; Switching circuits; Very large scale integration; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI, 1998. Proceedings of the 8th Great Lakes Symposium on
  • Conference_Location
    Lafayette, LA
  • ISSN
    1066-1395
  • Print_ISBN
    0-8186-8409-7
  • Type

    conf

  • DOI
    10.1109/GLSV.1998.665198
  • Filename
    665198