Title :
Synthesis of switched-capacitor power converters: An iterative algorithm
Author_Institution :
NXP Semiconductors, Eindhoven 5656AE, The Netherlands
Abstract :
Fibonacci limit for the achievable conversion gains of switched-capacitor power converters (SCPC) is known, but a simple synthesis algorithm is not available yet. In this paper, a simple iterative algorithm for the exhaustive synthesis of 2-phase SCPC topologies is presented. The main advantages of this approach are: (1) it is circuit-design oriented, and (2) it can be automated due to its iterative nature. In the iterative approach, topology synthesis results of (n-1) floating capacitors are used to synthesize topologies of n floating capacitors. In addition, an intuitive proof of the Fibonacci limit is given.
Keywords :
Capacitors; Clocks; DC-DC power converters; Iterative methods; Steady-state; Switches; Topology; Fibonacci limit; Switched-capacitor power converter; synthesis;
Conference_Titel :
Control and Modeling for Power Electronics (COMPEL), 2015 IEEE 16th Workshop on
Conference_Location :
Vancouver, BC, Canada
DOI :
10.1109/COMPEL.2015.7236477