DocumentCode :
2015327
Title :
OHMEGA : a VLSI superscalar processor architecture for numerical applications
Author :
Nakajima, Masaitsu ; Nakano, Hiraku ; Nakakura, Yasuhiro ; Yoshida, Tadahiro ; Goi, Yoshipki ; Nakai, Yuji ; Segawa, Reiji ; Xishida, T. ; Kadota, Hiroshi
fYear :
1991
fDate :
1991
Firstpage :
160
Lastpage :
168
Keywords :
Clocks; Delay; Hardware; Hazards; Job shop scheduling; Out of order; Permission; Pipelines; Processor scheduling; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Architecture, 1991. The 18th Annual International Symposium on
Print_ISBN :
0-89791-394-9
Type :
conf
DOI :
10.1109/ISCA.1991.1021609
Filename :
1021609
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2015327
