DocumentCode
2015495
Title
Hot carrier induced degradation in deep submicron MOSFETs at 100°C
Author
Li, E. ; Rosenbaum, E. ; Register, L.F. ; Tao, J. ; Fang, P.
Author_Institution
Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA
fYear
2000
fDate
2000
Firstpage
103
Lastpage
107
Abstract
This work demonstrates that Vg=Vd is the worst case stress condition for deep submicron NMOSFETs and PMOSFETs operating at 100°C. Degradation is more severe at 100°C than at room temperature even for supply voltages greater than 2.5 V. The effect of channel length on the substrate current´s temperature-dependence is also examined
Keywords
MOS integrated circuits; MOSFET; hot carriers; integrated circuit reliability; PMOSFET; channel length; deep submicron MOSFETs; hot carrier induced degradation; substrate current; temperature-dependence; Degradation; Hot carriers; MOSFETs; Registers; Space technology; Stress measurement; Temperature dependence; Temperature measurement; Testing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 2000. Proceedings. 38th Annual 2000 IEEE International
Conference_Location
San Jose, CA
Print_ISBN
0-7803-5860-0
Type
conf
DOI
10.1109/RELPHY.2000.843898
Filename
843898
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