Multi parameter method for yield analysis and reliability assessment

Parametric failure is becoming the main reason of yield/reliability loss in new products. Microprocessors on 0.35 μm and 0.25 μm processes show a high level of parametric (soft) failure. We propose to introduce a parametric process-to-design baseline by using basic physical relations of integrated product parameters and transistor level parameters as a function of systematic process instabilities on the die/wafer level. The deviations from the baseline are caused by process-related defects that impact yield and reliability. We have introduced a new multi-parameter method in order to calculate this deviation and separate between parametric systematic defects and random defects. The analysis of >700 K 0.25 μm microprocessor units showed that >16% of the units that have high deviation failed in burn-in (BI). The analysis of excursion material showed that the yield in subgroups of the units is a strong function of the deviation from the baseline. The new methodology enables the impact of process variation sources on product yield reliability and performance to be assessed