A W-band current combined power amplifier with 14.8dBm Psat and 9.4% maximum PAE in 65nm CMOS

Author

Xu, Zhiwei ; Gu, Qun Jane ; Chang, Mau-Chung Frank

Author_Institution

HRL Labs., Malibu, CA, USA

fYear

2011

fDate

5-7 June 2011

Firstpage

1

Lastpage

4

Abstract

We present a 101-117GHz power amplifier (PA) using two way current power combiner in 65nm bulk CMOS. It delivers up to 14.8dBm saturated output power with over 14dB power gain and better than 9.4% power added efficiency (PAE), which also achieves better than 11.6dBm output P_1dB. The PA features three stage transformer coupled differential architecture with integrated input and output baluns. To ensure the stability and improve efficiency, the PA first two stages adopt cascode structure and the last stage utilizes common source structure. A current power combiner is employed to combine the power from two separate PAs. The entire PA core occupies 0.106 mm² chip area and dissipates about 200mW.

Keywords

CMOS integrated circuits; baluns; field effect MIMIC; millimetre wave power amplifiers; power combiners; W-band power amplifier; baluns; bulk CMOS integrated circuit; common source structure; current combined power amplifier; current power combiner; frequency 101 GHz to 117 GHz; millimeter wave power amplifier; size 65 nm; three stage transformer; CMOS integrated circuits; CMOS technology; Frequency measurement; Gain; Power amplifiers; Power combiners; Power generation; Adaptive Bias; CMOS; PAE; Power Amplifier; Power Combiner; Saturated Output Power; W-band;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits Symposium (RFIC), 2011 IEEE

Conference_Location

Baltimore, MD

ISSN

1529-2517

Print_ISBN

978-1-4244-8293-1

Electronic_ISBN

1529-2517

Type

conf

DOI

10.1109/RFIC.2011.5940619

Filename

5940619