DocumentCode :
2016913
Title :
Concurrency-Enhancing Transformations for Asynchronous Behavioral Specifications: A Data-Driven Approach
Author :
Hansen, John ; Singh, Montek
Author_Institution :
North Carolina Univ., Chapel Hill, NC
fYear :
2008
fDate :
7-10 April 2008
Firstpage :
15
Lastpage :
25
Abstract :
Several asynchronous system design tools are based on syntax-driven translation of behavioral specifications (e.g., Balsa, Haste). While they provide rapid design times, the performance of the resulting implementations is typically limited, in part because specifications written by designers often have limited concurrency due to unpipelined operation and unnecessary sequencing. To overcome these challenges, this paper proposes a "source-to-source\´\´ transformation (i.e., code rewriting) of the original specification into a new one using a variety of concurrency-enhancing optimizations: (i) automatic parallelization, (ii) automatic pipelining, (iii) arithmetic optimization, and (iv) reordering of channel communication. Our approach has been integrated into an existing design flow, and applied to a suite of examples. Experimental results demonstrate that our approach correctly and efficiently rewrites the original specifications into highly concurrent ones. If code length is used as an indicator of designer effort, our approach reduces the required effort by a factor of 3.3x on average (up to 8.8x). Alternatively, the impact of our approach can be quantified by the throughput improvement achieved by optimizing the original specification: up to 59x speedup using our basic approach, and a further 5.2x using arithmetic optimization.
Keywords :
asynchronous circuits; computational linguistics; optimisation; arithmetic optimization; asynchronous behavioral specifications; asynchronous system design tools; automatic parallelization; automatic pipelining; channel communication; code rewriting; concurrency-enhancing transformations; data-driven approach; source-to-source transformation; syntax-driven translation; Arithmetic; Asynchronous circuits; Concurrent computing; Design optimization; Optimizing compilers; Pipeline processing; System recovery; Throughput; USA Councils; Writing; arithmetic optimization; asynchronous pipelines; code rewriting; concurrency enhancement; data-driven; high-level synthesis; parallelization; pipelining;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Asynchronous Circuits and Systems, 2008. ASYNC '08. 14th IEEE International Symposium on
Conference_Location :
Newcastle upon Tyne
ISSN :
1522-8681
Print_ISBN :
978-0-7695-3107-6
Type :
conf
DOI :
10.1109/ASYNC.2008.20
Filename :
4556995
Link To Document :
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