DocumentCode
2017176
Title
Mechanism of Bias-Temperature Instability: Results from Positive Gate Stress
Author
Ang, D.S. ; Du, G.A. ; Wang, Shuhui
Author_Institution
Nanyang Technol. Univ., Singapore
fYear
2007
fDate
11-13 July 2007
Abstract
Hole trap generation under positive gate stressing of the ultra-thin oxynitride gate p-MOSFET is investigated. The experimental evidence is shown to be consistent with the hole trapping framework proposed for NBTI. Deep-level hole traps pinned by the Si-SiO2 conduction band discontinuity and the slow repassivation of Nit account for long-term device degradation. Generation of shallow hole traps is revealed via the increased Delta|V th| following a fast positive-negative-positive voltage ramp. The results offer potential insights into understanding the role of processing (e.g. plasma induced oxide damage) on the NBTI of the p-MOSFET.
Keywords
MOSFET; conduction bands; hole traps; NBTI; Si-SiO2; Si-SiO2 - Interface; bias temperature instability; conduction band discontinuity; deep level hole traps; hole trap generation; positive gate stress; ultra thin oxynitride gate p-MOSFET; Current measurement; Degradation; Electron traps; Interface states; MOSFET circuits; Niobium compounds; Plasma temperature; Stress measurement; Titanium compounds; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Physical and Failure Analysis of Integrated Circuits, 2007. IPFA 2007. 14th International Symposium on the
Conference_Location
Bangalore
Print_ISBN
978-1-4244-1014-9
Type
conf
DOI
10.1109/IPFA.2007.4378065
Filename
4378065
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