DocumentCode
2017185
Title
Effects of the nonlinearity of the common-gate stage on the linearity of CMOS cascode low noise amplifier
Author
Cui, Chenglin ; Kim, Tae-Sung ; Kim, Seong-Kyun ; Cho, Jun-Kyung ; Kim, Su-Tae ; Kim, Byung-Sung
Author_Institution
Sungkyunkwan Univ., Suwon, South Korea
fYear
2011
fDate
5-7 June 2011
Firstpage
1
Lastpage
4
Abstract
This work presents the effects of the common-gate (CG) stage nonlinearity on the linearity of the cascode amplifier. Conventionally, the CG stage is assumed as an ideal current buffer in the CMOS cascode low noise amplifier (LNA) design, but the analysis shows that the CG stage limits the linearity of the cascode LNA as the gain increases, due to the finite output resistance of the CG stage and the parasitic capacitance at the interstage node. Therefore, the simple linearization of the CS stage has difficulties to enhance the gain of LNA as the operating frequency increases. To confirm the analysis, a 2 GHz CMOS LNA was designed and the gain and the nonlinearity were measured. The measurement results show that there exists optimum load impedance to achieve the maximum OIP3 of the LNA as expected by the analysis.
Keywords
CMOS analogue integrated circuits; low noise amplifiers; CMOS cascode low noise amplifier linearity; common-gate stage nonlinearity; frequency 2 GHz; optimum load impedance; parasitic capacitance; CMOS integrated circuits; Impedance; Impedance measurement; Linearity; Logic gates; Parasitic capacitance; Resistance; CMOS; Cascode amplifier; Common-Gate; Nonlinearity;
fLanguage
English
Publisher
ieee
Conference_Titel
Radio Frequency Integrated Circuits Symposium (RFIC), 2011 IEEE
Conference_Location
Baltimore, MD
ISSN
1529-2517
Print_ISBN
978-1-4244-8293-1
Electronic_ISBN
1529-2517
Type
conf
DOI
10.1109/RFIC.2011.5940635
Filename
5940635
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