DocumentCode
2018010
Title
Optimized code generation for programmable digital signal processors
Author
Yu, Kin H. ; Hu, Yu Hen
Author_Institution
Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
Volume
1
fYear
1993
fDate
27-30 April 1993
Firstpage
461
Abstract
The authors present a novel compilation model for optimized code generation for programming digital signal processors (PDSPs). The model uses artificial intelligence techniques to yield output code that is comparable (in some cases superior) to that of handwritten assembly codes by DSP experts. Porting the code generator to different PDSPs requires modifying only two processor-dependent modules: a pattern library and a rule base. A prototype code generator has been implemented, targeting a subset of the TMS32020´s architecture and instruction set. Several case studies are presented, which demonstrate the feasibility of the proposed approach.<>
Keywords
artificial intelligence; digital signal processing chips; program compilers; software portability; artificial intelligence; compilation model; feasibility; optimized code generation; pattern library; programmable digital signal processors; rule base;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, 1993. ICASSP-93., 1993 IEEE International Conference on
Conference_Location
Minneapolis, MN, USA
ISSN
1520-6149
Print_ISBN
0-7803-7402-9
Type
conf
DOI
10.1109/ICASSP.1993.319155
Filename
319155
Link To Document