DocumentCode :
2019451
Title :
An efficient residue to weighted converter for a new residue number system
Author :
Skavantzos, Alexander
Author_Institution :
Dept. of Electr. & Comput. Eng., Louisiana State Univ., Baton Rouge, LA, USA
fYear :
1998
fDate :
19-21 Feb 1998
Firstpage :
185
Lastpage :
191
Abstract :
The Residue Number System (RNS) is an integer system appropriate far implementing fast digital signal processors since it can support parallel, carry-free, highspeed arithmetic. In this paper a new RNS system and an efficient implementation of its residue-to-weighted converter are presented. The new RNS is a balanced 5-moduli system appropriate for large dynamic ranges. The new residue-to-binary converter is very fast and hardware-efficient and is based on a 1´s complement multioperand adder adding operands of size only 80% of the size of the system´s dynamic range
Keywords :
adders; digital signal processing chips; residue number systems; 1´s complement multioperand adder; balanced 5-moduli system; digital signal processors; dynamic range; dynamic ranges; highspeed arithmetic; integer system; residue number system; residue to weighted converter; Cathode ray tubes; Digital arithmetic; Digital signal processing; Digital signal processors; Digital systems; Dynamic range; Equations; Error correction; Fault tolerant systems; High speed integrated circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI, 1998. Proceedings of the 8th Great Lakes Symposium on
Conference_Location :
Lafayette, LA
ISSN :
1066-1395
Print_ISBN :
0-8186-8409-7
Type :
conf
DOI :
10.1109/GLSV.1998.665223
Filename :
665223
Link To Document :
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