A new DSP based DPLL incorporates a dither signal and an additional phase control to overcome the deleterious effect of truncation error

The linear analysis of digital phase locked loop (DPLL) does not include finite precision arising owing to the limited size of register or memory for processing or storing the coefficients or data in most of the literatures. This truncation in word length results a serious degradation in DPLL performance. This paper addresses a problem where a truncation error is purposely introduced at the phase detector output of a DSP based DPLL and application of an additional single tone dither signal at the digital control oscillator (DCO) input helps to reduce the effect of this error. But, the addition of this signal causes the overall phase error variance to increase. In this loop, more improvement in performance in terms of phase error variance is suggested by incorporating a further phase control in the DCO. The software simulation of the proposed loop is carried out in Matlab/Simulink environment. Various conclusive simulation results are found in support of the proposed loop when it is compared with the other versions on the grounds of acquisition performance, harmonic distortion and output signal to noise ratio.