Title :
An Improved Power Consumption Circuit of a 5.7 GHz Variable-Gain Low Noise Amplifier (VGLNA) for RF Applications
Author :
Lee, L. ; Jamuar, S.S. ; Sidek, R. Mohd ; Khatun, S.
Author_Institution :
Dept. of Electr. & Electron. Eng., Univ. Putra Malaysia, Selangor
Abstract :
A low voltage topology that uses a capacitively coupled resonating element has been introduced using 0.18 mum CMOS technology. The topology utilizes the decoupling scheme to dc isolate circuit elements that are connected in series and share a common dc current. A 5.7 GHz variable-gain low noise amplifier (VGLNA) is presented with simulation results exhibiting a noise figure of 1.02 dB, power gain of 19.41 dB with gain tuning range of 6 dB and IIP3 of -1.11 dBm. The power consumption reported is 12.88 mW at supply of Vdd = 0.7 V for power optimization circuit. Simulation results show that the proposed VGLNA has better noise performance and improved power consumption compared to the conventional cascode VGLNA
Keywords :
CMOS analogue integrated circuits; low noise amplifiers; microwave amplifiers; microwave integrated circuits; 0.18 micron; 0.7 V; 1.02 dB; 12.88 mW; 19.41 dB; 5.7 GHz; CMOS technology; capacitively coupled resonating element; low voltage topology; noise figure; power consumption circuit; power optimization circuit; variable-gain low noise amplifier; CMOS technology; Circuit noise; Circuit simulation; Circuit topology; Energy consumption; Gain; Low-noise amplifiers; Noise figure; Radio frequency; Radiofrequency amplifiers; capacitively coupled; low voltage; noise figure; power consumption; variable gain low noise amplifier;
Conference_Titel :
RF and Microwave Conference, 2006. RFM 2006. International
Conference_Location :
Putra Jaya
Print_ISBN :
0-7803-9745-2
Electronic_ISBN :
0-7803-9745-2
DOI :
10.1109/RFM.2006.331039
