Application of EMC Testing to Chip Level SOC (System on a CIp)

The advent of customer requirements for module level electromagnetic compatibility (EMC) testing has an impact on the successful achievement of application specific integrated circuit (ASIC) design and qualification. This paper will describe the applicability of the following EMC test standards to a SOC (system on a chip) device: ISO 11452, SAE J1113, AEC Q100, SAE J1752/3 and Ford ES-XW7T-1A278-AB and -AC. The testing presented will focus on: 1) immunity to power supply voltage dropout, 2) radiated emissions, 3) spark over parallel wire, 4) coupled immunity, and 5) RF immunity. Best practice design techniques for module PCB layout will be reviewed. A recently performed battery of EMC test results, including high temperature testing, for a sensor signal conditioner SOC IC will be presented in this paper as an illustration of the overall approach.