An FPGA implementation of dynamic reconfigurable lifting-based wavelet packet processor for real-time scalable audio coding

In this paper, dynamic algorithm transforms (DAT) for reconfigurable real-time processor for audio application based on the adaptive wavelet packet (WP) decomposition are presented. DA T techniques is to constrain a minimum cost sub-band decomposition of wavelet transform by maximinimizing the minimum masking threshold (which is limited by the perceptual entropy) in every sub-band for the given embedded processor architecture and temporal resolution. The processor architecture is based on the implementation of the wavelet transform by means of its factoring into lifting steps. Practical reconfiguration strategies for the given processor are presented.