Title :
Digital design of higher radix quaternary carry free parallel adder
Author :
Khalid, A. T M Shafiqul ; Awwal, A.A.S. ; Garcia, O.N.
Author_Institution :
Dept. of Comput. Sci. & Eng., Wright State Univ., Dayton, OH, USA
Abstract :
A high speed parallel full adder is designed which can perform carry-propagation-free addition of two modified signed digit quaternary numbers. The adder has been designed based on a mathematical model developed in the present work
Keywords :
adders; combinational circuits; digital arithmetic; logic design; parallel processing; carry-propagation-free addition; digital design; high speed parallel full adder; higher radix adder; mathematical model; quaternary carry free parallel adder; signed digit quaternary numbers; Adders; Computer science; Digital arithmetic; Digital circuits; Equations; Fuzzy logic; Integrated circuit technology; Logic circuits; Mathematical model; Parallel processing;
Conference_Titel :
Circuits and Systems, 1996., IEEE 39th Midwest symposium on
Conference_Location :
Ames, IA
Print_ISBN :
0-7803-3636-4
DOI :
10.1109/MWSCAS.1996.594082
