Parasitic parameter extraction and modeling of via of high speed differential pair

Since high speed digital signal interconnection usually consists of differential transmission lines and pairs of via, signals passing through pairs of via need carefully handling for via can be either capacitive or inductive. The modeling of high speed via is critical to match the impedance of a pair of via and differential transmission line. Parasitic parameters of a pair of via such as capacitances and inductances can be extracted by Q3d, a high performance EM parameter extraction software. Several variables are analyzed: the diameter of via, pad, anti-pad, space between the pair of via and position of ground via around the differential signal via. From the simulation results, parasitic parameters have a significant change with these variables changed. At the same time, TDR (Time domain reflection) and S parameter are also simulated by HFSS to verify the parasitic parameter´s effects. Parameter extraction and modeling with a pair of via is a helpful way for via optimization, which is commonly used in high speed digital signal interconnection, high frequency transceiver and many application areas.