DocumentCode
2024866
Title
Comparison of vector sigma-delta modulation and space-vector PWM
Author
Nieznanski, J. ; Wojewodka, A. ; Chrzan, P.J.
Author_Institution
Dept. Electr. & Control Eng., Tech. Univ. Gdansk, Poland
Volume
2
fYear
2000
fDate
2000
Firstpage
1322
Abstract
The paper introduces certain modifications to the basic idea of vector sigma-delta modulation (VSDM), aimed to eliminate the polarity reversals in the line-line voltages, and to reduce the inverter switching losses. The performance of this modified VSDM is then compared with the space-vector PWM (SVPWM). The comparison indicates that the VSDM enjoys performance figures that are close to-and in some regions even better than-the commonly accepted SVPWM algorithm. A very valuable property of VSDM, not shared by the SVPWM, is that it can be smoothly tuned to the designer´s priorities and varying operating conditions by simple parametric adjustments, without any modifications of the timing structure. Other assets include the freedom from minimum pulse width problems relaxed hardware requirements and reduced dead-time distortion in the lower voltage range. Thus, the VSDM can prove very useful as a complementary idea for the control of voltage-source inverters
Keywords
PWM invertors; losses; sigma-delta modulation; switching circuits; inverter switching losses reduction; line-line voltages; lower voltage range; polarity reversals elimination; reduced dead-time distortion; space-vector PWM; timing structure; vector sigma-delta modulation; voltage-source inverters control; Acoustic distortion; Control engineering; Delta-sigma modulation; Hardware; Pulse width modulation; Pulse width modulation inverters; Space vector pulse width modulation; Switching loss; Timing; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics Society, 2000. IECON 2000. 26th Annual Confjerence of the IEEE
Conference_Location
Nagoya
Print_ISBN
0-7803-6456-2
Type
conf
DOI
10.1109/IECON.2000.972313
Filename
972313
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