DocumentCode
2025146
Title
A high-speed A/D converter architecture for high-resolution applications
Author
Hamdy, N. ; Soliman, H.
Author_Institution
Arab Acad. for Sci. & Technol., Alexandria, Egypt
Volume
1
fYear
1996
fDate
18-21 Aug 1996
Firstpage
213
Abstract
Two high-speed A/D converter architectures are described. They make use of the hardware simplicity of cascaded and cyclic converter architecture. They could directly be cascaded to provide high resolution at reasonable component count. To attain enough speed reserve for cascading, the flash converter architecture is used as their core. Its relative hardware simplicity makes if amenable for monolithic integration. A 14-bit design example that could be used for several high speed applications is given
Keywords
analogue-digital conversion; cascade networks; integrated circuit design; signal resolution; 14 bit; 14-bit design example; cascaded converter architecture; cyclic converter architecture; flash converter architecture; hardware simplicity; high-resolution applications; high-speed A/D converter architecture; monolithic integration; Complexity theory; Hardware; Monolithic integrated circuits; Multiplexing; Neodymium; Quantization; Resistors; Switches; Throughput; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1996., IEEE 39th Midwest symposium on
Conference_Location
Ames, IA
Print_ISBN
0-7803-3636-4
Type
conf
DOI
10.1109/MWSCAS.1996.594095
Filename
594095
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