On-chip voltage noise monitor for measuring voltage bounce in power supply lines using a digital tester

Author

Aoki, Hideyuki ; Ikeda, Makalo ; Asada, Kunihiro

Author_Institution

Dept. of Electron. Eng., Tokyo Univ., Japan

fYear

2000

fDate

2000

Firstpage

112

Lastpage

117

Abstract

With increasing interconnect densities, voltage bounce noise in power supply lines is becoming an important problem. In this paper, we describe a method to measure voltage bounce in a power supply line on a chip. We use a voltage comparator circuit to make the output a digital value. We connect this circuit in series to output the results with less pins.

Keywords

CMOS integrated circuits; VLSI; analogue-digital conversion; comparators (circuits); electric noise measurement; integrated circuit measurement; integrated circuit testing; power supply circuits; signal processing equipment; voltage measurement; CMOS test chip; VLSI power supply noise; digital tester; driving NAND gate; on-chip voltage noise monitor; power supply lines; sampling method; time resolution; voltage bounce measurement; voltage bounce noise; voltage comparator circuit; Circuit noise; Circuit testing; Integrated circuit interconnections; Monitoring; Noise measurement; Pins; Power measurement; Power supplies; Semiconductor device measurement; Voltage measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures, 2000. ICMTS 2000. Proceedings of the 2000 International Conference on

Print_ISBN

0-7803-6275-7

Type

conf

DOI

10.1109/ICMTS.2000.844416

Filename

844416