DocumentCode
2025878
Title
A Low Complexity Algorithm and Architecture for Systematic Encoding of Hermitian Codes
Author
Agarwal, R. ; Koetter, Ralf ; Popovici, E.M.
Author_Institution
Univ. Coll. Cork, Cork
fYear
2007
fDate
24-29 June 2007
Firstpage
1336
Lastpage
1340
Abstract
We present an algorithm for systematic encoding of Hermitian codes. For a Hermitian code defined over GF(q 2), the proposed algorithm achieves a run time complexity of O(q 2) and is suitable for VLSI implementation. The encoder architecture uses as main blocks q varying-rate Reed-Solomon encoders and achieves a space complexity of O(q 2) in terms of finite field multipliers and memory elements.
Keywords
Reed-Solomon codes; VLSI; computational complexity; encoding; Hermitian codes; VLSI implementation; encoder architecture; finite field multipliers; low complexity algorithm; memory elements; run time complexity; space complexity; systematic encoding; varying-rate Reed-Solomon encoders; Clocks; Computer architecture; Cryptography; Educational institutions; Encoding; Galois fields; Mathematics; Microelectronics; Polynomials; Reed-Solomon codes;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Theory, 2007. ISIT 2007. IEEE International Symposium on
Conference_Location
Nice
Print_ISBN
978-1-4244-1397-3
Type
conf
DOI
10.1109/ISIT.2007.4557408
Filename
4557408
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