DocumentCode :
2025888
Title :
50 Gb/s DFF and decision circuits in InP DHBT technology for ETDM systems
Author :
Konczykowska, A. ; Jorge, F. ; Riet, M. ; Moulu, J. ; Godin, J.
Author_Institution :
Alcatel-Thales III-V Lab, Marcoussis, France
fYear :
2005
fDate :
3-4 Oct. 2005
Firstpage :
605
Lastpage :
607
Abstract :
In this paper we present two ICs fabricated in InP DHBT technology and devoted to 43 Gbit/s and over transmission systems: reshaping DFF for the transmitter and decision circuit for the receiver. High quality system operation and ease of insertion in system environment are achieved simultaneously with significant reduction of power consumption. 40 -50 Gb/s measurements are presented.
Keywords :
III-V semiconductors; bipolar integrated circuits; bipolar transistor circuits; decision circuits; heterojunction bipolar transistors; indium compounds; optical receivers; optical transmitters; time division multiplexing; 40 to 50 Gbit/s; DFF; DHBT technology; ETDM systems; InP; decision circuit; double heterojunction bipolar transistor; electrical time division multiplexing; receiver; transmitter; Circuits; Clocks; DH-HEMTs; Energy consumption; Frequency; Indium gallium arsenide; Indium phosphide; Optical receivers; Optical transmitters; Time division multiplexing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Gallium Arsenide and Other Semiconductor Application Symposium, 2005. EGAAS 2005. European
Conference_Location :
Paris
Print_ISBN :
88-902012-0-7
Type :
conf
Filename :
1637292
Link To Document :
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