DocumentCode :
2026214
Title :
ipPROCESS: using a process to teach IP-core development
Author :
Lima, Marília ; Aziz, André ; Alves, Diogo ; Lira, Patrícia ; Schwambach, Vitor ; Barros, Edna
Author_Institution :
Informatics Center, Univ. Fed. de Pernambuco, Recife, Brazil
fYear :
2005
fDate :
12-14 June 2005
Firstpage :
27
Lastpage :
28
Abstract :
The reusing of intellectual property cores has been an alternative to the increasing gap between design productivity and chip complexity of emerging system-on-chip (SoC) designs. But the design of IP-cores has its own challenges like portability, reusability, standards interfaces, well-defined and useful documentation, easy integration and so on. All these characteristics together make the design of an IP-core a complex task and in this way teaching this discipline has became a new challenge for educators. In this paper we present an experience about how the utilization of a well-defined development process can be used to facilitate and speed-up student learning.
Keywords :
electronic engineering education; industrial property; integrated circuit design; system-on-chip; teaching; IP-core development; SoC; intellectual property cores; ipPROCESS; student learning; system-on-chip; teaching; Design methodology; Documentation; Education; Field programmable gate arrays; Hardware design languages; Informatics; Intellectual property; Productivity; Prototypes; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Systems Education, 2005. (MSE '05). Proceedings. 2005 IEEE International Conference on
Print_ISBN :
0-7695-2374-9
Type :
conf
DOI :
10.1109/MSE.2005.38
Filename :
1509348
Link To Document :
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