DocumentCode :
2026833
Title :
Specification and validation of information processing systems by process encapsulation and symbolic execution
Author :
Boßung, Wolfgang ; Geyer, Thomas ; Huss, Sorin Alexander ; Wehmeyer, Lars
Author_Institution :
Lab. of Integrated Circuits & Syst., Tech. Hochschule Darmstadt, Germany
fYear :
2000
fDate :
2000
Firstpage :
89
Lastpage :
96
Abstract :
A process notation based on a functional partitioning of a new system is proposed as a high-level codesign model for specification, evaluation, and implementation purposes. A well-defined computational model allows the synchronization and activation of concurrent processes. The design environment includes the refinement steps from scheduling with dynamic processes via simplified scheduling/execution methods to the complete implementation. The relationship between specified behavioral classes and implemented states in the final core programs is the key issue in this development flow. Time uncritical parts are implemented in a heterogeneous environment communicating via a standard communication protocol. On the other hand, time critical processes and process connections can be implemented in C++ using SystemC, thus forming core programs encapsulated in a shell to fit the introduced and implemented activation rules. An example from the world of digital image processing systems illustrates the approach
Keywords :
formal specification; hardware-software codesign; image processing; symbol manipulation; synchronisation; C++ implementation; SystemC; activation rules; concurrent processes; core programs; design environment; digital image processing systems; functional partitioning; heterogeneous environment; high-level codesign model; implemented states; information processing systems; process encapsulation; refinement steps; scheduling; specification; specified behavioral classes; standard communication protocol; symbolic execution; synchronization; validation; Computer science; Concurrent computing; Dynamic scheduling; Encapsulation; Information processing; Integrated circuit technology; Laboratories; Process design; Processor scheduling; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI, 2000. Proceedings. IEEE Computer Society Workshop on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7695-0534-1
Type :
conf
DOI :
10.1109/IWV.2000.844535
Filename :
844535
Link To Document :
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