DocumentCode
2027024
Title
A Simulink-to-FPGA implementation tool for enhanced design flow [educational applications]
Author
Shanblatt, Michel A. ; Foulds, Brian
Author_Institution
Dept. of Electr. & Comput. Eng., Michigan State Univ., East Lansing, MI, USA
fYear
2005
fDate
12-14 June 2005
Firstpage
89
Lastpage
90
Abstract
With the continued growth in complexity of FPGA-based designs, the need for a more flexible and efficient design methodology has arisen. Currently, most designs are accomplished through the use of HDL-centric flows. However, device densities have increased at a pace that such flows have become both cumbersome and outdated. The need for a more innovative and higher-level design flow that directly incorporates model simulation with hardware implementation is needed. Simulink is a well-known tool which allows designers to model a system at a high level and is ideal for certain classes of applications, such as automotive control. The complication of using such a tool for both modeling and hardware implementation is that there currently exists no tool chain to generate hardware from the basic Simulink blockset. This research aims to bridge that gap and provide students a way to perform high-level modeling and hardware implementation in a timely manner for design projects.
Keywords
educational aids; field programmable gate arrays; hardware description languages; high level synthesis; logic simulation; Simulink-to-FPGA implementation tool; VHDL code; hardware implementation; high-level synthesis; model simulation; student design projects; system modeling tool; Application specific integrated circuits; Automotive engineering; Bridges; Design methodology; Field programmable gate arrays; Hardware design languages; High level synthesis; Java; Mathematical model; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Systems Education, 2005. (MSE '05). Proceedings. 2005 IEEE International Conference on
Print_ISBN
0-7695-2374-9
Type
conf
DOI
10.1109/MSE.2005.12
Filename
1509377
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