Title :
DefSim - the educational integrated circuit for defect simulation
Author :
Pleskacz, Witold A. ; Borejko, Tomasz ; Gugala, Tomasz ; Pizon, Pawel ; Stopjakova, Viera
Author_Institution :
Inst. of Microelectron. & Optoelectron., Warsaw Univ. of Technol., Poland
Abstract :
The educational integrated circuit, DefSim, is described. This chip is dedicated to the development of students´ skills in fault simulation and test pattern generation for digital circuits. It allows applying both voltage and current test methods and offers comparing of their efficiencies on basic digital circuit examples. DefSim was manufactured and its operation was verified experimentally.
Keywords :
educational aids; electronic engineering education; fault simulation; integrated circuit testing; test equipment; IC testing; current test methods; defect simulation; digital circuits; educational integrated circuit; fault simulation; test pattern generation; voltage test methods;
Conference_Titel :
Microelectronic Systems Education, 2005. (MSE '05). Proceedings. 2005 IEEE International Conference on
Print_ISBN :
0-7695-2374-9
DOI :
10.1109/MSE.2005.24
