• DocumentCode
    2028744
  • Title

    Reconfigurable Parallel Computing Architecture for On-Board Data Processing

  • Author

    Syed, Mohsin A. ; Schueler, Eberhard

  • Author_Institution
    EADS Astrium GmbH, Munich
  • fYear
    2006
  • fDate
    15-18 June 2006
  • Firstpage
    229
  • Lastpage
    236
  • Abstract
    The increasing use of new Earth-observation and communication technologies coupled with rapidly changing customer needs require a high performance and flexible processing technology for on-board data processing. Currently available processors for space cannot handle processing such a large magnitude. An alternative approach would be the development of application specific ICs (ASICs) which offer high processing power, but the lack of flexibility for adaptation to emerging standards and improvements is a major disadvantage. The extreme processing platform (XPP) developed by PACT AG offers a solution to this dilemma by providing the flexibility of a processor kernel along with the performance similar to an ASIC. The XPP is a runtime reconfigurable data processing technology built using a scalable array of arithmetic processing units, embedded memories, high bandwidth I/O, a packet oriented internal network and designed to support parallelism. This paper gives an overview of the XPP core architecture, compares the technology with currently available space processors, and assesses the implementation of wavelet transformation algorithm on XPP and the transfer of XPP architecture to a radiation tolerant semiconductor technology
  • Keywords
    aerospace computing; microprocessor chips; parallel architectures; reconfigurable architectures; ASIC; Earth-observation; application specific integrated circuit; arithmetic processing unit; embedded memory; extreme processing platform; flexible processing technology; on-board data processing; packet oriented internal network; processor kernel; radiation tolerant semiconductor technology; reconfigurable parallel computing architecture; wavelet transformation algorithm; Application specific integrated circuits; Arithmetic; Communications technology; Computer architecture; Data processing; Kernel; Parallel processing; Runtime; Space technology; Standards development;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Adaptive Hardware and Systems, 2006. AHS 2006. First NASA/ESA Conference on
  • Conference_Location
    Istanbul
  • Print_ISBN
    0-7695-2614-4
  • Type

    conf

  • DOI
    10.1109/AHS.2006.62
  • Filename
    1638165