Title :
Adaptable Architectures for Signal Processing Applications
Author_Institution :
Dept. of Electr. & Comput. Eng., Rochester Univ.
Abstract :
In this paper, state-of-the-art reconfigurable architectures are reviewed and their main drawback in reaching TeraByte per second bandwidth is identified. A concept of new adaptable architecture for signal processing applications is proposed that will enable TB/s processing in the future. Current prototypes of smaller scale modules show groundbreaking benefits in reaching the targeted goal
Keywords :
computer architecture; digital signal processing chips; TeraByte per second bandwidth processing; adaptable architecture; reconfigurable architecture; signal processing application; Application software; Computer architecture; Digital signal processing; Digital signal processing chips; Hardware; High performance computing; Multimedia computing; Multimedia systems; Reconfigurable architectures; Signal processing;
Conference_Titel :
Adaptive Hardware and Systems, 2006. AHS 2006. First NASA/ESA Conference on
Conference_Location :
Istanbul
Print_ISBN :
0-7695-2614-4
DOI :
10.1109/AHS.2006.14
