DocumentCode
2028789
Title
Adaptable Architectures for Signal Processing Applications
Author
Margala, Martin
Author_Institution
Dept. of Electr. & Comput. Eng., Rochester Univ.
fYear
2006
fDate
15-18 June 2006
Firstpage
247
Lastpage
254
Abstract
In this paper, state-of-the-art reconfigurable architectures are reviewed and their main drawback in reaching TeraByte per second bandwidth is identified. A concept of new adaptable architecture for signal processing applications is proposed that will enable TB/s processing in the future. Current prototypes of smaller scale modules show groundbreaking benefits in reaching the targeted goal
Keywords
computer architecture; digital signal processing chips; TeraByte per second bandwidth processing; adaptable architecture; reconfigurable architecture; signal processing application; Application software; Computer architecture; Digital signal processing; Digital signal processing chips; Hardware; High performance computing; Multimedia computing; Multimedia systems; Reconfigurable architectures; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Adaptive Hardware and Systems, 2006. AHS 2006. First NASA/ESA Conference on
Conference_Location
Istanbul
Print_ISBN
0-7695-2614-4
Type
conf
DOI
10.1109/AHS.2006.14
Filename
1638167
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