Title :
NoC-centric partitioning and reconfiguration technologies for the efficient sharing of multi-core programmable accelerators
Author :
Balboni, Marco ; Bertozzi, Davide
Author_Institution :
Eng. Dept., Univ. of Ferrara, Ferrara, Italy
Abstract :
Today, multi- and many-core architectures are gaining momentum as a potential source of hardware acceleration, bringing to new challenges for system designers related to both system virtualization and runtime testing. My research activity tackles these challenges exploiting and optimizing the capabilities of reconfiguring the routing function at runtime.
Keywords :
field programmable gate arrays; multiprocessing systems; network-on-chip; reconfigurable architectures; virtualisation; NoC-centric partitioning technologies; NoC-centric reconfiguration technologies; hardware acceleration; many-core architectures; multicore programmable accelerators; routing function; runtime testing; system virtualization; Computer architecture; Hardware; Optimization; Routing; Runtime; System recovery; System-on-chip; Multi-Core Architectures and Support; Reconfigurable Computing & FPGA Based Architectures;
Conference_Titel :
High Performance Computing & Simulation (HPCS), 2015 International Conference on
Conference_Location :
Amsterdam
Print_ISBN :
978-1-4673-7812-3
DOI :
10.1109/HPCSim.2015.7237107
