• DocumentCode
    2028954
  • Title

    KoVer : a sophisticated residue arithmetic core generator

  • Author

    Kostaras, Nikolaos ; Vergos, H.T.

  • Author_Institution
    Dept. of Comput. Eng. & Inf., Patras Univ., Greece
  • fYear
    2005
  • fDate
    8-10 June 2005
  • Firstpage
    261
  • Lastpage
    263
  • Abstract
    Numerous architectures have been recently proposed for residue arithmetic components, each with its own speed, area and power consumption characteristics. In this paper, we present KoVer, a novel software tool that gives a designer the opportunity to explore several architectures for implementing his residue arithmetic blocks, select the one that best suits his goals and instantly get the HDL level description of the selected architecture.
  • Keywords
    hardware description languages; residue number systems; software architecture; HDL level description; KoVer software tool; power consumption characteristics; residue arithmetic core generator; Computer architecture; Cryptography; Digital arithmetic; Energy consumption; Hardware design languages; Informatics; Power engineering and energy; Power engineering computing; Software tools; TCPIP;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Rapid System Prototyping, 2005. (RSP 2005). The 16th IEEE International Workshop on
  • ISSN
    1074-6005
  • Print_ISBN
    0-7695-2361-7
  • Type

    conf

  • DOI
    10.1109/RSP.2005.27
  • Filename
    1509465