Prototyping a residential gateway using Xilinx ISE

Author

Song, S.W. ; Zheng, J.D. ; Gardner, W.B.

Author_Institution

Dept. of Phys. & Comput. Sci., Wilfrid Laurier Univ., Waterloo, Ont., Canada

fYear

2005

fDate

8-10 June 2005

Firstpage

267

Lastpage

269

Abstract

This paper presents a residential gateway (RG) prototyping process using Xilinx Integrated Software Environment (ISE) version 6.1i. The RG was designed for broadband residential multiservices based on a SONET over DWDM (dense wavelength division multiplexing) access network. The RG design was targeted for Xilinx Virtex II FPGA for prototyping purpose. The RG core design and the prototyping process using Xilinx ISE, including simulation and implementation, are discussed in this paper.

Keywords

broadband networks; field programmable gate arrays; integrated software; internetworking; wavelength division multiplexing; SONET; Xilinx Integrated Software Environment; Xilinx Virtex II FPGA; broadband residential multiservices; dense wavelength division multiplexing; residential gateway prototyping; Field programmable gate arrays; IEC standards; ISO standards; Optical fiber cables; Optical fiber networks; Prototypes; Roentgenium; SONET; Software prototyping; Wavelength division multiplexing;

fLanguage

English

Publisher

ieee

Conference_Titel

Rapid System Prototyping, 2005. (RSP 2005). The 16th IEEE International Workshop on

ISSN

1074-6005

Print_ISBN

0-7695-2361-7

Type

conf

DOI

10.1109/RSP.2005.40

Filename

1509467

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2029013