• DocumentCode
    2030131
  • Title

    An open electronic system level multi-SPARC virtual platform and its toolchain

  • Author

    Fang, Pin-Hao ; Wang, Yu-Lin ; Chen, Zhong-Ho ; Su, Alvin W Y ; Shieh, Ce-Kuen

  • Author_Institution
    Dept. of CSIE, Nat. Cheng-Kung Univ., Tainan, Taiwan
  • fYear
    2010
  • fDate
    16-18 Dec. 2010
  • Firstpage
    478
  • Lastpage
    482
  • Abstract
    We present a multi-core virtual platform which follows single-core architecture, SPARC v8, available as an open source development suite. The proposed multi-SPARC system operates at electronic system level to accelerate its simulation speed. TLM channels are devised to connect the processors. To simplify the use of the proposed virtual platform, we define some specific APIs for data transaction and developers can simply follow the pre-defined protocol and complete the data transaction. We also implement the TLM interface for external modules to communicate with the host virtual platform. Furthermore, the proposed virtual platform is capable of running multiple applications with dynamic loading of application programs in run time. That means the multiple applications could execute sequentially without pre-loading all programs when initialized. The virtual platform with 4 SPARC cores can execute up to 1605.88K cycles per second on a 2.4 GHz Core 2 Duo machine. Moreover, the developers do not take too much effort to get used to our virtual platform, since its architecture follows the traditional one, and they could concentrate on architecture implementation as well.
  • Keywords
    application program interfaces; computer architecture; embedded systems; multi-threading; multiprocessing systems; protocols; public domain software; virtual reality; APIs; Core 2 Duo machine; SPARC v8; TLM channels; TLM interface; application programs; data transaction; dynamic loading; frequency 2.4 GHz; multiSPARC virtual platform; open electronic system level; open source development suite; pre-defined protocol; single-core architecture; toolchain; Biological system modeling; Computational modeling; Data models; Loading; Multicore processing; Program processors; electronic system level and transaction level modeling; multi-core; virtual platform;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Symposium (ICS), 2010 International
  • Conference_Location
    Tainan
  • Print_ISBN
    978-1-4244-7639-8
  • Type

    conf

  • DOI
    10.1109/COMPSYM.2010.5685464
  • Filename
    5685464