• DocumentCode
    2030878
  • Title

    The design of logic gates using Single Electron Box (SEB) Nano-Devices

  • Author

    Rehan, Sameh Ebrahim

  • Author_Institution
    Commun. & Electron. Eng. Dept., Mansoura Univ. (MU), Mansoura, Egypt
  • fYear
    2011
  • fDate
    6-8 April 2011
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    The Single Electron Box (SEB) is the basic functional Single Electron Nano-Devices (SENDs). In this paper, a detailed analysis of the SEB basic operation is reviewed. The SEB with extra input capacitors is presented with adjusted parameters so as to get same digital levels for both inputs and outputs. Both NOT and NAND logic gates followed by a double-inverter stage are proposed. The detailed schematic diagrams along with the corresponding simulation results (using SIMON 2.0) of these SEB logic gates are included.
  • Keywords
    logic design; logic gates; nanotechnology; single electron devices; NAND logic gate; NOT logic gate; double inverter stage; functional single electron nanodevices; logic gates design; single electron box nanodevices; Boolean logic gates; Coulomb Blockade (CB); Single Electron Box (SEB); Single Electron Nano-Devices (SENDs); Tunnel Junction (TJ);
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2011 6th International Conference on
  • Conference_Location
    Athens
  • Print_ISBN
    978-1-61284-899-0
  • Type

    conf

  • DOI
    10.1109/DTIS.2011.5941436
  • Filename
    5941436
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2030878