DocumentCode
2031441
Title
An improved analytic method to calculate emitter follower delay including emitter resistance
Author
Brauer, E.J.
Author_Institution
Dept. of Electr. Eng., Kentucky Univ., Lexington, KY, USA
Volume
1
fYear
1996
fDate
18-21 Aug 1996
Firstpage
309
Abstract
As bipolar transistor size decreases, emitter resistance becomes increasingly important in estimating transient delay. We use a quasi-linear large-signal bipolar junction transistor model and linear trial functions in coupled node equations to calculate delay of emitter followers including the effect of emitter resistance. When compared to SPICE simulations, our method produces accurate low-to-high delays for a factor of 10 increase in emitter resistance
Keywords
bipolar digital integrated circuits; bipolar transistors; buffer circuits; delays; equivalent circuits; semiconductor device models; timing; BJT model; analytic method; bipolar junction transistor model; coupled node equations; emitter follower delay; emitter resistance; linear trial functions; quasi-linear large-signal model; transient delay estimation; Capacitance; Delay estimation; Diodes; Electric resistance; Equations; Impedance; Integrated circuit interconnections; Steady-state; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1996., IEEE 39th Midwest symposium on
Conference_Location
Ames, IA
Print_ISBN
0-7803-3636-4
Type
conf
DOI
10.1109/MWSCAS.1996.594148
Filename
594148
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