DocumentCode
2032118
Title
Incorporating SIMS Structures in Product Wafers in Order to Perform SIMS and other Material Analysis and Achieve Wafer Level Information about the Front-End Processing
Author
Budri, Thanas ; Krott, Loren ; Patel, Neil ; Smith, Aaron ; Gurcan, Burcay ; Crocker, Kendra ; Supczak, Randy ; Printy, Craig
Author_Institution
National Semicond., South Portland, ME
fYear
2006
fDate
22-24 May 2006
Firstpage
17
Lastpage
20
Abstract
In this paper, we summarize how the introduction of SIMS structures near the global alignment marks of product wafers serve as an additional way to acquire detailed analytical information about front-end processing and can minimize product yield loss without waiting for metal 1 processing when electrical testing (ET) becomes possible
Keywords
materials testing; process monitoring; secondary ion mass spectroscopy; semiconductor technology; SIMS structures; electrical testing; front end processing; global alignment marks; material analysis; product wafers; wafer level information; Electron beams; Implants; Information analysis; Performance analysis; Probes; Semiconductor materials; Silicon germanium; Substrates; Testing; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Manufacturing Conference, 2006. ASMC 2006. The 17th Annual SEMI/IEEE
Conference_Location
Boston, MA
ISSN
1078-8743
Print_ISBN
1-4244-0254-9
Type
conf
DOI
10.1109/ASMC.2006.1638717
Filename
1638717
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