Title :
Prime-way Interleaved Memory
Author_Institution :
York University, Ontario Canada
Abstract :
In this paper, we study prime-way inter leaved memory in the context of vector multiproces sor systems. Practical, efficient techniques for imple mentation of prime-way interleaved memory are pre sented. A method for minimizing access contention among multiple vector streams is described.
Keywords :
Bandwidth; Clocks; Computer science; Computer vision; Degradation; Equations; Hardware; Parallel processing; Pipelines; Vector processors;
Conference_Titel :
Parallel Processing, 1993. ICPP 1993. International Conference on
Conference_Location :
Syracuse, NY, USA
Print_ISBN :
0-8493-8983-6
DOI :
10.1109/ICPP.1993.152
