Abstract :
Yield loss in semiconductor manufacturing has been a concern since the invention of the integrated circuit by Kilby, et. al (1958). There has often been contentious disagreement in the literature on the subject of yield modeling. From a business perspective, the utility of accurately describing past yields and predicting the future yield of a product is obvious. It is arguably the single most influential metric to gauge the financial success of a product, process, and manufacturer. Unfortunately, simple models fail to accurately describe the actual mechanisms of yield loss, and models with good fidelity can be extremely complex, thus difficult to implement and sustain. Most parsimonious die yield models use the Poisson distribution as the base. It has been and is well known that certain Poisson assumptions, e.g. spatial independence of faults, are frequently and violently violated. These violations often cause systematic bias in yield estimations using these models, to the point of making the model predictions grossly inaccurate, usually in the unoptimistic direction. Yield modeling "state-of-the-art" now uses other distributions almost exclusively, of which the negative binomial is the most popular. The only additional term that needs definition from the previous Poisson distribution is the clustering parameter, alpha. This clustering parameter ranges from 1, which indicates a high degree of fault clustering, to infin, which indicates no clustering at all...random faults. The International Technical Roadmap for Semiconductors (2005) recommends this yield model with a clustering parameter of 2, but this value is a sweeping generalization that simplifies the model, but may or may not represent the yield of a certain process or product with acceptable fidelity. This presentation discusses studies using the negative binomial yield model with innovative spatial statistics using Markov random fields and nonlinear regression adaptations to directly estimate both D0 and a simultaneously. It discusses the coupling of statistical, mathematical, and fuzzy logic approaches to scaling those estimates to other products and technologies. These procedures can be employed to accomplish an accurate comparison of product yields, make design recommendations, and to forecast yields for products even when they have yet to be manufactured. Model fidelities and predictions have been proven very accurate. The presentation also presents an innovative approach to the prediction of yield over time that utilizes a modified logistic model, to estimate yield learning rates and quantify the speed and acceleration of yield improvements
Keywords :
Markov processes; Poisson distribution; binomial distribution; fuzzy logic; integrated circuit yield; regression analysis; Markov random fields; Poisson distribution; die yield models; fault clustering; fuzzy logic; modified logistic model; negative binomial; nonlinear regression; product yields; semiconductor manufacturing; yield improvements; yield learning rates; yield loss; yield modeling; yields forecast; Circuit faults; Fuzzy logic; Integrated circuit manufacture; Integrated circuit yield; Manufacturing processes; Markov random fields; Predictive models; Semiconductor device manufacture; Statistics; Yield estimation;