• DocumentCode
    2033066
  • Title

    Rapid multi-scale transient thermal modeling of packaged microprocessors using hybrid approach

  • Author

    Barabadi, B. ; Joshi, Yogendra K. ; Kumar, Sudhakar

  • Author_Institution
    G.W. Woodruff Sch. of Mech. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
  • fYear
    2012
  • fDate
    5-7 Dec. 2012
  • Firstpage
    157
  • Lastpage
    164
  • Abstract
    This paper studies the rapid transient thermal analysis of a packaged high power microprocessor, forced convection cooled using a heat sink. A spatially resolved power map for Intel Core 2 Duo Penryn processor was considered. Two different transient power profiles were investigated: an impulsively applied power map, and an oscillatory variation power map. We extended and demonstrated the capability of a recently developed hybrid approach in modeling several decades of length scale from package to chip at a considerably lower computational cost, while maintaining satisfactory accuracy. The proper orthogonal decomposition (POD) technique was used for the rapid prediction of the transient thermal response for impulsive vs. oscillatory power applied to the chip. The results were compared with a detailed finite element (FE) model developed in COMSOL®. The close agreement between the two models confirms the capability of the multi-scale model in rapidly predicting accurate temperature profiles, without performing detailed FE simulations, which can significantly decrease the computational cost in parametric modeling.
  • Keywords
    electronics packaging; finite element analysis; microprocessor chips; thermal analysis; transient analysis; COMSOL; FE model; Intel Core 2 duo Penryn processor; POD technique; finite element model; forced convection; heat sink; hybrid approach; impulsively applied power map; length scale; oscillatory variation power map; packaged high power microprocessor; parametric modeling; proper orthogonal decomposition technique; rapid multiscale transient thermal modeling; spatially resolved power map; temperature profiles; transient power profiles; Conductivity; Conferences; Decision support systems; Electronics packaging; Heating; Substrates; Thermal conductivity;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference (EPTC), 2012 IEEE 14th
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4673-4553-8
  • Electronic_ISBN
    978-1-4673-4551-4
  • Type

    conf

  • DOI
    10.1109/EPTC.2012.6507070
  • Filename
    6507070