A transformation for system level design model specifications into implementation descriptions

Author

Schulz, S.

fYear

2001

fDate

2001

Firstpage

247

Lastpage

255

Abstract

This paper presents the transformation of system level model specifications to implementation level process-based design specification for embedded systems design purposes. Its main contribution is the definition of a formal mapping of a parallel discrete event system specification (DEVS) atomic model specification to a timed communicating sequential process (tCSP) description. In addition, the extension for this component mapping to composed design models is discussed. A simple example is used to illustrate the mapping of a simple model component to the corresponding tCSP process in detail. Finally, the use and an application of this mapping is presented in the context of a model-based codesign methodology

Keywords

communicating sequential processes; discrete event systems; embedded systems; formal specification; hardware-software codesign; DEVS atomic model specification; component mapping; composed design models; embedded systems; formal mapping; implementation descriptions; implementation level process-based design specification; model-based codesign methodology; parallel discrete event system specification; system level design model specifications; tCSP description; timed communicating sequential process description; Application software; Discrete event systems; Embedded software; Embedded system; Hardware; Power engineering computing; Power system modeling; Process design; Real time systems; System-level design;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Science Society, 2001. SCCC '01. Proceedings. XXI Internatinal Conference of the Chilean

Conference_Location

Punta Arenas

ISSN

1522-4902

Print_ISBN

0-7695-1396-4

Type

conf

DOI

10.1109/SCCC.2001.972654

Filename

972654