A novel fully differential current buffer with ultra low input impedance, high CMRR, low power and low voltage

Author

Azhari, Seyed Javad ; Ghorbani, Alireza ; Safari, Leila

Author_Institution

Dept. of Electron./Electron. Res., Univ. of Sci. & Technol., Tehran, Iran

Volume

1

fYear

2011

fDate

8-10 April 2011

Firstpage

229

Lastpage

233

Abstract

In this paper a novel fully differential current buffer is introduced. Its novelty originates from two things; 1) special technique applied to reject the input common mode signal and provide high CMRR of 109dB and higher, 2) deliberately arrangement of virtual grounded inputs by a very small but powerful circuit that admirably granted the block the ultra low input impedance of 38mΩ. Furthermore, it consumes low power of 105μW and operates with low voltage supplies of ±0.75V, due to its compact structure. These superb results are verified by HSpice simulation using 0.18μm CMOS technology of TSMC. Monte Carlo simulation of the proposed buffer is also examined that proved its robustness against technology Process (mismatches).

Keywords

CMOS memory circuits; buffer storage; CMOS technology; HSpice simulation; Monte Carlo simulation; TSMC; fully differential current buffer; size 0.18 mum; ultralow input impedance; virtual grounded inputs; CMOS integrated circuits; CMOS technology; Impedance; Low voltage; Monte Carlo methods; Robustness; Transistors; Current Buffer; Fully Differential; High CMRR; Low Power; Low Voltage; Ultra Low Input Impedance;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics Computer Technology (ICECT), 2011 3rd International Conference on

Conference_Location

Kanyakumari

Print_ISBN

978-1-4244-8678-6

Electronic_ISBN

978-1-4244-8679-3

Type

conf

DOI

10.1109/ICECTECH.2011.5941595

Filename

5941595