Title :
Analyzing cache performance on multi-stream execution processor
Author :
Chih-Zong Lin ; Chien-Chao Tseng ; Chung-Ping Chung
Author_Institution :
Dept. of Comput. Sci. & Inf. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
In this paper, effect of multi-stream (or multithreaded) execution on the performance of cache system is presented. Parameters considered include cache size, line size, set associativity, and unification of instruction/data. The results presented in this paper can be used when designing a multithreaded processor system.<>
Keywords :
buffer storage; memory architecture; parallel architectures; performance evaluation; cache performance; cache size; cache system; line size; multi-stream execution processor; multithreaded processor system; set associativity; unification of instruction/data; Computer aided instruction; Computer architecture; Computer science; Concurrent computing; Microprocessors; Parallel processing; Performance analysis; Process design; Switches; Very large scale integration;
Conference_Titel :
TENCON '93. Proceedings. Computer, Communication, Control and Power Engineering.1993 IEEE Region 10 Conference on
Conference_Location :
Beijing, China
Print_ISBN :
0-7803-1233-3
DOI :
10.1109/TENCON.1993.319914
