• DocumentCode
    2035132
  • Title

    Conditional annulling for superscalar processors

  • Author

    Chun-Hung Wen ; Chih-Yuan Cheng ; Yun-Yu Kung ; Chung-Yu Chang ; Yen-Jen Oyang

  • Author_Institution
    Dept. of Comput. Sci. & Inf. Eng., Nat. Taiwan Univ., Taipei, Taiwan
  • Volume
    1
  • fYear
    1993
  • fDate
    19-21 Oct. 1993
  • Firstpage
    40
  • Abstract
    This paper proposes an architectural feature for superscalar processors called conditional annulling. The conditional annulling mechanism achieves both the effects of conditional execution and speculative execution without incurring a significant increase of hardware complexity and cost. All effectiveness evaluation carried out in this paper shows the conditional annulling mechanism is effective in improving superscalar processor instruction scheduling.<>
  • Keywords
    computer architecture; microcomputers; performance evaluation; architectural feature; conditional annulling; conditional execution; effectiveness evaluation; instruction scheduling; pipeline processing; speculative execution; superscalar processors; Clocks; Costs; Decoding; Degradation; Pipelines; Processor scheduling; Registers; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    TENCON '93. Proceedings. Computer, Communication, Control and Power Engineering.1993 IEEE Region 10 Conference on
  • Conference_Location
    Beijing, China
  • Print_ISBN
    0-7803-1233-3
  • Type

    conf

  • DOI
    10.1109/TENCON.1993.319923
  • Filename
    319923
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2035132