DocumentCode
2035342
Title
Hybrid-on-chip communication architecture for dynamic MP-SoC protection
Author
Sepulveda, Johanna ; Gogniat, Guy ; Pires, Ricardo ; Chau, Wang J. ; Strum, Marius
Author_Institution
Microelectron. Lab. LME, Univ. of Sao Paulo, Sao Paulo, Brazil
fYear
2012
fDate
Aug. 30 2012-Sept. 2 2012
Firstpage
1
Lastpage
6
Abstract
MPSoCs are able to support multiple applications on the same chip. This flexibility also represents a vulnerability, turning the MPSoC security specially challenging. Most of the current MPSoCs security services are based on symmetric and public-key cryptographic mechanisms. So that, MPSoCs integrate a large set of keys that must be exchanged in an efficient and secure way. In such scenario, any security concept will be ineffective if the key management is weak. In this paper, we present the implementation of an on-chip hybrid communication (HoCs) security-based architecture, that combines bus and Network-on-chip (NoC), to address the efficient and secure key management at MPSoCs. The HoC implements dynamically the QoSS (Quality of Security Service) concept that allows the customization of security. We evaluate the effectiveness of our approach over several MPSoCs attack scenarios and estimate their impact on the overall performance. We show that our architecture can perform a fast detection of a wide range of attacks and a fast configuration of the different security policies for several MPSoC applications. Our hybrid approach saves upto 16% and 25% of communication latency and power consumption, respectively, when compared to the NoC-based architecture without any security.
Keywords
computer architecture; logic design; multiprocessing systems; public key cryptography; system-on-chip; HoC security-based architecture; MPSoC security service; NoC; QoSS; communication latency; dynamic MP-SoC protection; hybrid-on-chip communication architecture; network-on-chip; power consumption; public-key cryptographic mechanism; quality of security service; secure key management; security policy; symmetric cryptographic mechanism; Buffer overflow; Data mining; Bus; Network-on-Chip; Quality-of-Security-Service; Security;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuits and Systems Design (SBCCI), 2012 25th Symposium on
Conference_Location
Brasilia
Print_ISBN
978-1-4673-2606-3
Type
conf
DOI
10.1109/SBCCI.2012.6344419
Filename
6344419
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