FPGA design for real time flaw detection on edges using the LEDges technique

This work presents a FPGA design for real time flaw detection on edges based on LEDges technique. The LEDges, on one hand, significantly reduces the computational effort to perform the image segmentation, representation and description. On the other hand reduces the use of costly architectural resources such as processor and memory. Thus the FPGA design of the LEDges allows the implementation of automated visual inspection systems satisfying the increasing demand for performance. We have developed, implemented and applied the FPGA design to a real industrial problem, where defects were successfully detected on edges of toothpaste tubes. We achieve lower response time and lower use of computational resources than other solutions which have same computational complexity.