DocumentCode :
2036216
Title :
Power plane noise coupling to high speed signals
Author :
Demuynck, Filip ; Eichinger, Ludwig ; Poisson, Vincent
Author_Institution :
SMS-EEsof EDA Division, Keysight Technologies, United States
fYear :
2015
fDate :
10-13 May 2015
Firstpage :
1
Lastpage :
4
Abstract :
Power plane noise is a well-known source of signal integrity (SI) issues in a high speed digital design. This paper first reviews the basic principles which are at the root of the problem. We then illustrate how electronic design automation (EDA) tools can be used to analyze the phenomenon and provide guidance on how to mitigate the issue by adjusting the design.
Keywords :
Capacitors; Impedance; Inductance; Integrated circuit modeling; Noise; Power supplies; channel simulation; electro-magnetic simulation; power aware signal integrity analysis; power integrity; signal integrity;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal and Power Integrity (SPI), 2015 IEEE 19th Workshop on
Conference_Location :
Berlin, Germany
Type :
conf
DOI :
10.1109/SaPIW.2015.7237390
Filename :
7237390
Link To Document :
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