DocumentCode :
2036261
Title :
Design and simulation of five level cascaded inverter using multilevel sinusoidal pulse width modulation strategies
Author :
Manimala, V. ; Geetha, N. ; Renuga, P.
Author_Institution :
EEE Dept., Mepco Schlenk Eng. Coll., Sivakasi, India
Volume :
2
fYear :
2011
fDate :
8-10 April 2011
Firstpage :
280
Lastpage :
283
Abstract :
Paper proposes design and simulation of single phase cascaded five level inverter. The inverter can produce five different output voltage levels across the load. The multilevel sinusoidal pulse width modulation switching strategy was used and THD value for every scheme was analyzed. The main advantage of this technique is the ability to reduce harmonics. MATLAB/SIMULINK software was used for simulation and verification of the proposed circuit for implementing FPGA based five level cascaded inverter. The proposed circuit produces high output voltage without use of transformers and lower electromagnetic interference.
Keywords :
PWM invertors; electromagnetic interference; field programmable gate arrays; harmonic distortion; logic design; mathematics computing; transformers; FPGA; MATLAB/SIMULINK software; THD; electromagnetic interference; multilevel sinusoidal pulse width modulation switching strategy; single phase cascaded five level inverter; transformers; Bridge circuits; Harmonic analysis; Integrated circuit modeling; Inverters; Pulse width modulation; Switches; five level inverter; multilevel Sinusoidal pulse width modulation; multilevel inverter; total harmonic distortion;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Computer Technology (ICECT), 2011 3rd International Conference on
Conference_Location :
Kanyakumari
Print_ISBN :
978-1-4244-8678-6
Electronic_ISBN :
978-1-4244-8679-3
Type :
conf
DOI :
10.1109/ICECTECH.2011.5941701
Filename :
5941701
Link To Document :
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