DocumentCode
2037301
Title
A high-speed CMOS OP amplifier with a dynamic switching bias circuit
Author
Wakaumi, Hiroo
Author_Institution
Div. of Electron. & Inf. Eng., Tokyo Metropolitan Coll. of Ind. Technol., Tokyo, Japan
fYear
2011
fDate
13-18 Sept. 2011
Firstpage
2370
Lastpage
2373
Abstract
This paper presents a high-speed CMOS OP Amp with a dynamic switching bias circuit capable of processing video signals of over 2 MHz with decreased dissipated power. The OP Amp, capable of operating at 10 MHz dynamic switching rate, was designed and showed through simulations a dissipated power of 66% of that in conventional continuous operation. This OP Amp was applied to a switched capacitor (SC) non-inverting amplifier with a gain of 2 and its high-speed 10 MHz dynamic switching operation, capable of processing video signals, was demonstrated. By increasing the switching duty ratio to 70%, its power dissipation decreased to 56% of that in normal operation. Some inaccuracy of the SC amplifier resulted mainly from the limited open gain of the OP Amp. This circuit configuration should be extremely useful in realizing low-power wide-band signal processing ICs.
Keywords
CMOS analogue integrated circuits; capacitors; high-speed integrated circuits; operational amplifiers; video signal processing; SC non-inverting amplifier; circuit configuration; dissipated power; dynamic switching bias circuit; dynamic switching operation; frequency 10 MHz; high-speed CMOS OP amplifier; low-power wide-band signal processing IC; power dissipation; switched capacitor; video signal processing; CMOS integrated circuits; Capacitors; Gain; Operational amplifiers; Power dissipation; Switches; Switching circuits; CMOS; operational amplifier; switched capacitor circuit; video signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
SICE Annual Conference (SICE), 2011 Proceedings of
Conference_Location
Tokyo
ISSN
pending
Print_ISBN
978-1-4577-0714-8
Type
conf
Filename
6060371
Link To Document